AD9842A |
RFQ for AD9842A Required Field |
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| Technical/Catalog Information | AD9842AJST |
| Vendor | Analog Devices Inc |
| Category | Integrated Circuits (ICs) |
| Package / Case | 48-LQFP |
| Packaging | Tube |
| Type | CCD Signal Processor |
| Interface | 3-Wire Serial |
| Supply Voltage | 2.7 V ~ 3.6 V |
| Current - Supply | - |
| Input Type | Logic |
| Output Type | Logic |
| RoHS Status | RoHS Non-Compliant |
| Other Names | AD9842AJST AD9842AJST |
| Product | Manufacturers | Pack | D/C |
| AD9842A | Analog Devices | new | - |
The AD9841A and AD9842A are complete analog signal proces-sors for CCD applications. Both products feature a 20MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays.
The AD9841A/AD9842A's signal chain consists of an input clamp, correlated double sampler (CDS), Pixel Gain Amplifier (PxGA), digitally controlled variable gain amplifier (VGA), black level clamp, and A/D converter. The AD9841A offers 10-bit ADC resolution, while the AD9842A contains a true 12-bit ADC. Additional input modes are provided for processing analog video signals.
The internal registers are programmed through a 3-wire serial digital interface. Programmable features include gain adjustment,black level adjustment, input configuration, and power-down modes.The AD9841A and AD9842A operate from a single 3 V power supply, typically dissipate 78 mW, and are packaged in a 48-lead LQFP.
Typical Application |
Features |
| Digital Still CamerasDigital Video Camcorders | 20 MSPS Correlated Double Sampler (CDS)4 dB 6 dB 6-Bit Pixel Gain Amplifier (PxGA )(R)2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA)Low Noise Clamp CircuitsAnalog Preblanking Function10-Bit (9841) or 12-Bit (9842) 20 MSPS A/D ConverterAuxiliary Inputs with VGA and Input Clamp3-Wire Serial Digital Interface3 V Single Supply OperationLow Power: 65 mW @ 2.7 V Supply48-Lead LQFP Package |
| Respect |
WithParameterTo |
Min | Max | Unit |
| AVDD1, AVDD2 DVDD1, DVDD2 DRVDD Digital Outputs SHP, SHD, DATACLK CLPOB, CLPDM, PBLK SCK, SL, SDATA VRT, VRB, CMLEVEL BYP1-4, CCDIN Junction Temperature Lead Temperature (10 sec) |
AVSS DVSS DRVSS DRVSS DVSS DVSS DVSS AVSS AVSS |
0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 |
+3.9 +3.9 +3.9 DRVDD + 0.3 DVDD + 0.3 DVDD + 0.3 DVDD + 0.3 AVDD + 0.3 AVDD + 0.3 150 300 |
V V V V V V V V V °C °C |
